The producer issues one TMA load for a 2,048-byte A tile and another for a 2,048-byte B tile. It then calls arrive.expect_tx(4096) to contribute one arrival and make the barrier wait for all 4,096 bytes.
When each copy finishes, hardware reports a 2,048-byte complete-tx update to the barrier. After the second copy, tx-count reaches zero.
The consumer calls TIRx's blocking try_wait(phase=0). It may read the A and B tiles only after the barrier completes that phase.